Skew-tolerant circuit design /
As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of cl...
| Основен автор: | Harris, David |
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| Формат: | Електронна книга |
| Език: | English |
| Публикувано: |
San Francisco :
Morgan Kaufmann Publishers,
℗♭2001.
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| Серия: |
Morgan Kaufmann series in computer architecture and design
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| Предмети: | |
| Онлайн достъп: |
http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=210319 |
| Подобни документи: |
Print version::
Skew-tolerant circuit design. |
| Онлайн достъп от Библиотека ”Паница” на Американския университет в България: |
http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=210319 |
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| Провери в Paniza Library, AUBG | Сигнатура: |
TK7868.T5 H37 2001eb |
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