Местоположение: System-on-chip test architectures :

Електронна книга

System-on-chip test architectures : nanometer design for testability /

Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semic...

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Други автори:	Wang, Laung-Terng., Stroud, Charles E., Touba, Nur A.
Формат:	Електронна книга
Език:	English
Публикувано:	Amsterdam ; Boston : Morgan Kaufmann Publishers, ℗♭2008.
Серия:	Morgan Kaufmann series in systems on silicon.
Предмети:	Systems on a chip > Testing. Integrated circuits > Very large scale integration > Testing. Integrated circuits > Very large scale integration > Design. TECHNOLOGY & ENGINEERING > Electronics > Circuits > VLSI & ULSI. TECHNOLOGY & ENGINEERING > Electronics > Circuits > Logic. COMPUTERS > Logic Design. VLSI. Electronic books.
Онлайн достъп:	http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=214796
Подобни документи:	Print version:: System-on-chip test architectures.

Онлайн достъп от Библиотека ”Паница” на Американския университет в България:	http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=214796

Провери в Paniza Library, AUBG	Сигнатура:	TK7895.E42 S978 2008eb

System-on-chip test architectures : nanometer design for testability /

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