ASIC and FPGA verification : a guide to component modeling /
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate v...
Основен автор: | Munden, Richard. |
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Формат: | Електронна книга |
Език: | English |
Публикувано: |
San Francisco, Calif. :
Morgan Kaufmann,
℗♭2005.
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Серия: |
Morgan Kaufmann series in systems on silicon.
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Предмети: | |
Онлайн достъп: |
http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=117163 |
Подобни документи: |
Print version::
ASIC and FPGA verification. |
Онлайн достъп от Библиотека ”Паница” на Американския университет в България: |
http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=117163 |
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Провери в Paniza Library, AUBG | Сигнатура: |
TK7874 .M86 2005eb |
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